Ripple-control receiver responsive to multiple command control

ABSTRACT

Disclosed herein is a ripple control receiver responsive to a transmitted pulse train comprising a start command, control commands, and a confirmation command. The receiver compares the transmitted start command, control commands and confirmation command with comparable commands stored in the receiver and verifies the transmitted commands prior to effecting the commanded control operations.

Niederberger et a1.

States Patent SYNCHRONOUS SELECTOR 1s1 RIPIPLE-CONTROL RECEIVER 3,516,063 6/1970 Arkin 340/163 R RESPONSIVE o MULTIPLE COMMAND 3,541,513 11/1970 Paterson 340/15 R 3,577,187 /1971 Benson 340/151 X CONTROL 3,588,825 6/1971 Shook 340/163 R [75] Inventors: Felix Niederberger, Zug; Christian 3,656,1 4/1972 Paul] 340/151 R S h i st i h b h f 3,697,970 /1972 Jaxhcimcr 340/151 R X Switzerland [73] Assignee: Landis & Gyr AG, Zug, Switzerland Primary Exami'lerHurold L Pitts Attorney, Agent, or Firm-Morgan, Finnegan. Durham [22] Filed. July 24, 1972 & Pine [21] Appl. No.: 274,223

[57] ABSTRACT Foreign Application Priority Data June 26, 1971 Switzerland; 11014/71 Disclosed herein is a ripple comm] receiver responsive 1 to a transmitted pulse train comprising a start com- 52 us. (:1. 340/310 340/167 R mand 60mm Commands and a confirmation 51 Int. Cl. H04q 5/00 mand- The receiver compares the transmitted [58] Field of Search 340/151 R 163 R 310 Command COMO commands and nfirmati0n 340/167; 325/37 39 mand with comparable commands stored in the re- 1 ceiver and verifies the transmitted commands prior to [56] Reference-s Cited effecting the commanded control operations.

UNITED STATES PATENTS I t v 14 Claims, 5 Drawing Figiires 3,453,597 7/1969 Pomerene 340/163 X ,39 1 CLOCK I ATTN an I I I l BACKGROUND AND-BRIEF DESCRIPTION OF THE INVENTION The present invention relates to ripple control receivers whereby control commands, which are associated in time with a start command, are used to effect control operations. The ripple control receiver utilizes a comparator to compare the transmitted control commands, which are in the form of groups of pulses, with simila groups of pulses stored in the receiver. e

One type of known ripple control receiver is configured to receive a transmitted program in which the start command consists of a single start pulse which' is of relatively long duration compared to succeeding control pulses. This type of ripple control receiver only effects the commanded control operation when the start pulse exceeds a predetermined minimum duration. The circuitry for 'ascertainingthe duration of the start pulse is independent of the actual comparator used to verify the control commands, thereby making such a ripple control receiver more complicated and expensive than the receivers of the present invention.

Another type of known ripple control receiver has no separate circuitry for ascertaining the duration of start pulses but, rather, starts whenver a transmitted pulse is such that it passes through an input filter. 'A switching operation'is carried out by the'ripple control receiver wherever operating pulses of a defined length, which are derived from the start pulse and the succeeding command pulses, coincide with a sequence of reference pulses generated in the ripple control receiver. In the event of a temporary interruption of transmission,

there is a real danger that the receiver may be actigrams.

In accordance with the present invention, the same comparator functions to compare the groups of pulses comprising the start command, the control commands apparatus means that the construction of the ripple control receivers of the present invention is simplified. Since the total number of steps in the transmitted program can be subdivided in any desired way into three groups, i.e., the start command, the control commands and the confirmation command, the receivers of the present invention are very versatile. The start command can be coded in any one of a large number of differentways and can, therefore, be used to address numerous different ripple control receivers interconnected via a common transmission network. Further, by utilizing a pulse code for the start command the re- .ceiver is rendered relatively immune from random interference.

BRIEF DESCRIPTION OF THE DRAWINGS Several exemplary embodiments of the invention will now be explained in greater detail by reference to the accompanying drawings which form a part of the specification and in which:

FIG. 1 is a diagram of a pulse train;

FIG. 2 is a schematic block diagram of a comparator;

FIG. 3 is a schematic block diagram of a ripple control receiver utilizing serial comparison;

FIG. 4 is a schematic block diagram of a ripple control receiver using multiple commands and a serial comparison; and

FIG. 5 is a schematic block diagram of a ripple control receiver using parallel comparison.

DETAILED DESCRIPTION FIG. 1 is a diagram of a pulse train corresponding to an exemplary transmitted program. The pulse train is subdivided into a start command 1, control commands 2 and a confirmation command 3. The control commands 2 comprise a block address 4, a group address 5, and execute commands 6. In the illustrated transmitted program, start command 1 consists of steps 7 to 9, control commands 2 consist of steps 10 to 25 and confirmation command 3 consists of step 26. As shown, each step is equal in duration. Start command 1 is given by the pulse code LLO, [representing a pulse and 0no pulse. Confirmation command 3 is shown in the form of a single pulse, although it too may comprise a pulse code of several steps. Execute command 6 consists of steps 19 to 25. The presence of a pulse in this interval occasions the connection of the load associated with the corresponding step, whilea gap in the pulse sequence causes the associated load to be disconnected.

FIG. 2 shows a comparator 27 for processing the transmitted program of FIG. 1. Comparator 27 comprises a programmer 28 and a logic switching unit 29. In programmer 28 the particular pulse combinations to which the ripple control receiver is to respond are formed and stored. The designation [in programmer 28 means that a transmission pulse is to arrive at the program step in question, while 0 indicates the steps at which no pulse must occur. designates the neutral steps which are not tested for their state by the receiver and, consequently, have no effect on the switching action of the receiver. Finally, A refers to the execute step associated with the. load and indicates whether it is to be connected or disconnected depending on the presence or absence of a pulse corresponding to the exe-.

cute step.

Comparator 27 compares the transmitted pulse program with the groups of pulses stored in programmer 28. The transmitted groups of pulses are shown entering logic unit 29 by arrow 30. Logic unit 29 compares the transmitted groups of pulses with those stored in Programming L O neutral execution state of L transmitted signal correct II'ICOHCCI COI'ICCI On incorrect correct correct off If the transmitted program consisting of start command 1, control commands 2 and confirmation command 3 agrees with one of the combinations stored in programmer 28, then an output signal will appear at either output 31 or 32 of logic unit 29, either during or shortly after receipt of the confirmation command, and the output signal from logic unit 29 will cause a load (not shown) to be connected or disconnected. The load will be connected if a transmitted pulse is received at the corresponding execute step, e.g., step 22 of the pulse train of FIG. 1.

Instead of using start command code LLO as described above, a sustained pulse having the duration of two steps may be transmitted. Programmer 28 will still respond if set to start command code LLO. The start code LLO now has the effect of testing the start pulse for its minimum and maximum duration.

The comparator 27 shown in FIG. 2 may take many different forms. Comparator 27 may be electromechanical or may be fully electronic. The transmitted program may be processed and compared by either serial or parallel techniques. Some illustrative electronic arrangements will not be described.

The ripple control receivers of the present invention may be connected, for example, to a power distribution network to receive programs transmitted thereon. Such ripple control receivers may be used, for example, in conjunction with a centralized watt-hour meter reading system wherein remotely located ripple control receivers are interrogated from a central location under the guidance of a computer. Thus, a power distribution network is indicated in FIG. 3 as 36, to which an input filter 37 and a power supply 38 are connected. The mains voltage is also fed to a clock 39 which generates timing pulses synchronized with the mains voltage. The clock output pulses go to synchronous selector 41 by way of attenuator 40. Synchronous selector 41 may, for

example, be a ring counter. Programmer 28 is a crossbar selector having three horizontal bars 42 to 44 and n vertical bars 45, n corresponding to the number of steps in the ripple control program. The bars 45 lead to n output of synchronous selector 41. Two additional outputs 46 and 47 also emanate from synchronous selector 41.

Bar 42 of programmer 28 is connected to one input of AND gate 48, bar 43 to one input of AND gate 49 and bar 44 to one input of AND gate 50, all three AND gates forming part of logic switching unit 29. The output of input filter 37 is connected to input 51 of differentiating circuit 52, to an inverting input of AND gate 48, and to inputs of AND gates 49 and 50. An output of attenuator 40 is the final input to each of AND gates 48, 49 and 50. An OR gate 53 combines the outputs of AND gates 48 and 49 as well as output 47 of synchronous selector 41. The output of OR gate 53 is fed to the reset input 54 of error flip flop 55, hereafter FF 55.

The output of AND gate is connected to the set input 56 of execute FF 57. Outputs 58 and 59 of execute FF 57 are connected via AND gates 60 and 61 and switching amplifier 62 to a master switch 63. Output 64 of error FF is connected to the stop input 65 of clock 39, to the reset input 66 of attenuator 40, to the reset input 67 of execute FF 57 and to zero set input 68 of synchronous selector 41. The output of differentiat'or 52 is connected to set input 69 of error FF 55.

Upon receipt of a combination of pulses corresponding to a particular control operation to be effected by the ripple control receiver, the vertical bars of cross bar selector 28 which are associated with the L-position are connected to bar 42, the vertical bars associated with the 0-position are connected to bar 43 and the vertical bar associated with the execute step is connected to bar 44. The vertical bars associated with neutral steps are not connected.

The ripple control receiver described above and illustrated in FIG. 3 operates as follows. As soon as there appears on power distribution network 36 a ripple control pulse of sufficient duration to pass through input filter 37, error FF is set and changes state. As a consequence thereof clock 39, attenuator 40 and synchronous selector 41 are released and execute FF 57 is reset, unless already in that condition. The timing pulses generated by clock 39 are reduced by attenuator 40 and advance selector 41 synchronously with the steps of the transmitted program. Thus, a pulse is applied by selector 41 to each of the vertical bars of programmer 28 in sequence. In accordance with the stored program, a pulse passes to the second input of one of AND gates 48, 49 or 50 at all non-neutral steps of the transmitted program. The corresponding step of the received ripple control program appears simultaneously at the firstinput of these AND gates. If the step received agrees with the step stored, then AND gates 48 and 49 will remain blocked at the third input, even during the timing pulse. AND gate 50 will be energized during a timing pulse if a transmitted pulse arrives at the execute step associated with master switch 63 (step 22 in the pulse train of FIG. I). AND gate 50 will, however, remain blocked if no transmitted pulse is received at this step. The state of execute FF S7 is determined in this manner.

To summarize, so long as the transmitted program agrees with the stored program, no output appears at AND gates 48 or 49 and error FF 55 is not reset. Therefore, when a transmitted pulse arrives at the execute step, AND gate 50 produces an output which sets execute FF 57.

At the step of synchronous selector 41 following in time confirmation command 26, a pulse appears at output 46 of selector 41 and, depending on the state of cxecute FF 57, opens'either AND gate or AND gate 61 thereby causing master switch 63 to be turned either on or off. At the next step of synchronous selector 41 a pulse appears at output 47 thereof which resets error FF 55 by way of OR gate 53. Output 64 of error FF 55 then sets synchronous selector 41 to zero, stops clock 39 and resets attenuator 40. Output 64 of error FF 55 serves as a system reset command.

If, during a transmitted program an error occurs and a step of a start, control, or confirmation command does not agree with the information stored in cross-bar selector 28, one of the AND gates 48 and 49 will produce an output. This output will reset error FF 55 via OR gate 53 and clock 39, attenuator 40 and synchronous selector 41 will be reset by output 64 of error FF 55.

The signals from the input of filter 37 and from synchronous'selector 41, which are the inputs to AND gates 48 to 50, will normally not be completely coincident in time because of delays in transmission and in processing. To prevent error FF 55 or execute FF 57 from being incorrectly reset, the signals supplied to AND gates 48 to 50 from attenuator 40 are relatively short in duration so that coincidence is tested over a short time interval when the signals to AND gates 48 to 50 must appear.

Alternatively, instead of feeding timing pulses to AND gates 48 to 50 from attenuator 40, it is possible to provide a synchronous selector 41 which emits pulses of short duration. Thus, AND gates 48 to 50 would be 2-input instead of 3-input AND gates. Further, flip flops which are timed by the timing pulses may be used as error FF 55 and execute FF 57.

Differentiator 52 ensures that only the leading edge of any transmitted pulse reaches the set input 69 of error FF 55. This prevents a signal from appearing simultaneously at both inputs 54 and 69 of error FF 55, since the leading edge of the transmitted pulse always precedes the timing pulse.

Referring now to FIG. 4, it will be explained how the ripple control receiver of FIG. 3 can be modified to process multiple commands. The reference designations in FIG. 4 which are the same as those in FIGS. 1-3 identify the same components. In FIG. 4 the vertical bars 45 of programmer 28, which is in the form of a cross-bar selector, are connected to the n outputs of synchronous selector 41. Here, however, the connection is by means of isolation diodes 70, in contrast to the direct connection shown in FIG. 3. Also in contrast with FIG. 3, the logic switching unit 29 has an additional connection 71 leading from theinverted output 72 of error FF 55 to a third input of AND gates 60 and 61. Output 64 of error FF 55 is connected to input 65 of clock 39, input 66 of attenuator 40 and input 68 of synchronous selector 41 by way of AND gate 73, in contrast to the direct connection shown in FIG. 3. A second master switch is designated 63. Like master switch 63, it is associated with a programmer 28' a logic switching unit 29 and a switching amplifier 62'. Between differentiator 52 and the set inputs 69, 69' of error FFs 55 and 55' is AND gate 90, the second input of which is connected to the output of AND gate 73.

only when both of the error FFs 55 and 55' are reset,

Le, when the transmitted program agrees neither with the programs stored in programmer 28 nor with those stored in programmer 28', so that AND gate 73 produces an output. Error FFs 55 and 55 will be set by a transmitted pulse via AND gate 90 only when both FF's 55 and 55' have been reset by an error signal so gate 90. I

FIG. 5 illustrates a ripple control receiver wherein the transmitted program and the stored program are compared inparallel. The reference designations in FIG. 5 which are identical with reference designations previously used identify the same components. The output of inputfilter 37 is connected to input 74 of memory 75, which is preferably in the form of a shift register, and to timing circuit 76, the output of which goes to enable input 77 of shift register 75. Between attenuator 40 and timing input 78 of shift register 75 is AND gate 79. Shift register 75 has n outputs, the last of which is connected to an inverting input of AND gate 79.

Programmer 28 is in the form of a logic programming unit 81, preferrably consisting of a diode network. Those outputs of shift register 75 at which an L signal is to appear at the end of the transmitted program are connected to the cathode of diodes 82, the anodes of which are connected to input 83 of logic switching unit 29. The outputs of shift register 75 at which a 0 signal is to appear are connected to the anodes of diodes 84, thecathodes of which are connected to inverting input 85 of logic unit 29. Finally, the position in shift register 75 assigned to the execute step is coupled by diode 86 to input 87 of logic unit 29, while the neutral positions in shift register 75 are not sensed.

Input 83 of logic unit 29 is connected to the logic L voltage by resistor 88 while input 85 of unit 29 is connected to the logic 0 voltage by resistor 89. Logic unit 29 performs the following logic functions. An L is produced at output 31 of unit 29 when input 83 is L, input 85 is 0 and input 87 is L. An L appears at output 32 when input 83 is L, input 85 is 0 and input 87 is 0.

The ripple control receiver of FIG. 5 operates as follows: In the absence of a transmitted program, timing circuit 76 produces a blocking signal tofenable input 77 of shift register 75 which renders shift register 75 inoperative. As soon as a transmission pulse is received, timing circuit 76 frees shift register 75 and the transmitted pulses comprising the program are shifted into shift register 75, from right to left as shown in FIG. 5. As soon as the start command (pulse 7 of FIG. 1) arrives in the last position of the shift register, an L signal appears at input 80 of AND gate 79, thereby blocking that gate. The entire transmitted program is now stored in shift register 75.

Diodes 82 of logic programming unit 81 act as a logical AND link with resistor 88 while diodes 84 act as a logical OR link with resistor 89. If the transmitted pulse train consisting of the start command, the control commands, and the confirmation command agrees with the sequence stored by logic programming unit 81, all of the diodes 82, 84 will be denergized, the potential at input 83 of logic switching unit 29 will be L while the potential at input will be 0. Master switch 63 will be turned on or off according to whether an L or a O signal appears at input 87 of unit 29. If the transmitted and stored programs do not agree, at least one of the diodes 82, 84 will keep input 83 at O or input 85 at L so that no control operation will be carried out.

A predetermined time after the last pulse has been received, timing circuit 76 sets shift register 75 to zero. The ripple control receiver of FIG. 5 is then ready to receive a new transmitted program.

The ripple control receiver of FIG. 5 can be modified to respond to multiple commands. Thus, the outputs of,

shift register 75 may be connected to a plurality of programmers 81', 81", in the form of logic programming units. Diodes 82, 84 and 86 then perform both a logic programming function as well as an isolation function.

As already mentioned, the comparator for comparing the received program with the stored program may consist either of'electronic or electromechanical elements. The same holds true not only for the comparator but also for the other units described. The substitution of individual electronic units for mechanical components performing a similar function, or vice versa, merely represents a substitution of equivalent elements familiar to those skilled in the art.

The invention disclosed and claimed herein is not limited to the specific mechanisms and techniques herein shown and described since modifications will undoubtedly occur to those skilled in the art. Hence departures may be made from the form of the invention without departing from the principles thereof.

What is claimed is:

l. A ripple control receiver responsiveto a transmitted program containing a start command, control commands and a confirmation command including:

a. receiver means for receiving said transmitted start command, control commands and confirmation command;

b. program storage means wherein are stored a start command, control commands and a confirmation command;

c. comparator means operably connected to said receiver means and said program storage means and responsive thereto for comparing said transmitted and stored start commands, control commands and confirmation commands; and

d. execute means operably connected to the output of said comparator means and responsive thereto for executing the commanded control operation upon a favorable comparison of said transmitted and stored start, control and confirmation commands.

2. A ripple control receiver according to claim 1 wherein said transmitted and stored start commands, control commands and confirmation commands are in pulse code form.

3. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including:

a. receiver means for receiving said transmitted start command, control commands and confirmation command;

b. program storage means wherein are stored a start command, control commands and a confirmation command;

c. synchronous selector means operably connected to said program storage means for sequentially interrogating same in timed relation to said transmitted program to reproduce said stored start command, control commands and confirmation command;

d. comparator means operably connected to said receiver means, said program storage means and said synchronous selector means and responsive thereto for comparing said transmitted and stored start commands, control commands and confirmation commands; and

e. execute means operably connected to the output of said comparator means and responsive thereto for executing the commanded control operation upon favorable comparison of said transmitted and stored start, control and confirmation commands.

4. A ripple control receiver according to claim 3 wherein said comparator means includes means for inhibiting the operation of said synchronous selector means in the event of an unfavorable comparison of any of said transmitted and stored start, control and confirmation commands.

5. A ripple control receiver according to claim 3 wherein said program storage means includes cross-bar selector means.

6. A ripple control receiver according to claim 3 wherein said comparator means includes means for comparing said transmitted and stored start, control and confirmation commands over only a portion of each program step.

7. A ripple control receiver according to claim 3 wherein said comparator means includes a single comparator for comparing said transmitted and stored start, control and confirmation commands.

8. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including:

a. receiver means for receiving said transmitted start, command, control commands and confirmation command;

b. first and second program storage means wherein are stored respectively a start command, control commands and a confirmation command forming first and second stored programs;

c. synchronous selector means operably connected to said first and second program storage means for sequentially interrogating same in timed relation to said transmitted program to reproduce said first and second sets of start, control and confirmation commands;

d. first and second comparator means operably connected to said receiver means, said first and second program storage means and said synchronous selector means and responsive thereto for comparing said transmitted start, control and confirmation commands to said first and second stored start, control and confirmation commands; and

e. execute means operably connected to the outputs of said first and second comparator means and responsive thereto for executing the commanded control operation upon favorable comparison of said transmitted program with either said first or second stored programs.

9. A ripple control receiver according to claim 8 further including means for inhibiting the operation of said synchronous selector means in the event of unfavorable comparisons of any of said transmitted and stored start, control and confirmation commands in bothsaid first and second comparator means.

10. A ripple control receiver according to claim 8 wherein said first and second program storage means include cross-bar selector means and wherein said first and second comparator means include means for comparing said transmitted program with said first and second stored programs over only a portion of each program step.

11. A ripple control receiver according to claim 8 wherein said first and second comparator means each includes a single comparator for comparing said transmitted and stored start, control and confirmation commands. v

12. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including:

a. receiver means for receiving said transmitted start command, control commands and confirmation command;

b. input storage means operably connected to said receiver means and responsive thereto for storing said transmitted start, control and confirmation commands;

0. program storage means wherein are stored a start command, control commands and a confirmation command;

d. comparator means operably connected to said input storage means and said program .storage means and responsive thereto for comparing said LII transmitted and stored start commands, control commands and confirmation commands; and

e. execute means operably connected to the output of said comparator means and responsive thereto for executing the commanded control operation upon favorable comparison of said transmitted and stored start, control and confirmation commands.

of said input storage means.

* l =l i 

1. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including: a. receiver means for receiving said transmitted start command, control commands and confirmation command; b. program storage means wherein are stored a start command, control commands and a confirmation command; c. comparator means operably connected to said receiver means and said program storage means and responsive thereto for comparing said transmitted and stored start commands, control commands and confirmation commands; and d. execute means operably connected to the output of said comparator means and responsive thereto for executing the commanded control operation upon a favorable comparison of said transmitted and stored start, control and confirmation commands.
 2. A ripple control receiver according to claim 1 wherein said transmitted and stored start commands, control commands and confirmation commands are in pulse code form.
 3. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including: a. receiver means for receiving said transmitted start command, control commands and confirmation command; b. program storage means wherein are stored a start command, control commands and a confirmation command; c. synchronous selector means operably connected to said program storage means for sequentiallY interrogating same in timed relation to said transmitted program to reproduce said stored start command, control commands and confirmation command; d. comparator means operably connected to said receiver means, said program storage means and said synchronous selector means and responsive thereto for comparing said transmitted and stored start commands, control commands and confirmation commands; and e. execute means operably connected to the output of said comparator means and responsive thereto for executing the commanded control operation upon favorable comparison of said transmitted and stored start, control and confirmation commands.
 4. A ripple control receiver according to claim 3 wherein said comparator means includes means for inhibiting the operation of said synchronous selector means in the event of an unfavorable comparison of any of said transmitted and stored start, control and confirmation commands.
 5. A ripple control receiver according to claim 3 wherein said program storage means includes cross-bar selector means.
 6. A ripple control receiver according to claim 3 wherein said comparator means includes means for comparing said transmitted and stored start, control and confirmation commands over only a portion of each program step.
 7. A ripple control receiver according to claim 3 wherein said comparator means includes a single comparator for comparing said transmitted and stored start, control and confirmation commands.
 8. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including: a. receiver means for receiving said transmitted start, command, control commands and confirmation command; b. first and second program storage means wherein are stored respectively a start command, control commands and a confirmation command forming first and second stored programs; c. synchronous selector means operably connected to said first and second program storage means for sequentially interrogating same in timed relation to said transmitted program to reproduce said first and second sets of start, control and confirmation commands; d. first and second comparator means operably connected to said receiver means, said first and second program storage means and said synchronous selector means and responsive thereto for comparing said transmitted start, control and confirmation commands to said first and second stored start, control and confirmation commands; and e. execute means operably connected to the outputs of said first and second comparator means and responsive thereto for executing the commanded control operation upon favorable comparison of said transmitted program with either said first or second stored programs.
 9. A ripple control receiver according to claim 8 further including means for inhibiting the operation of said synchronous selector means in the event of unfavorable comparisons of any of said transmitted and stored start, control and confirmation commands in both said first and second comparator means.
 10. A ripple control receiver according to claim 8 wherein said first and second program storage means include cross-bar selector means and wherein said first and second comparator means include means for comparing said transmitted program with said first and second stored programs over only a portion of each program step.
 11. A ripple control receiver according to claim 8 wherein said first and second comparator means each includes a single comparator for comparing said transmitted and stored start, control and confirmation commands.
 12. A ripple control receiver responsive to a transmitted program containing a start command, control commands and a confirmation command including: a. receiver means for receiving said transmitted start command, control commands and confirmation command; b. input storage means operably connected to said receiver means and responsive thereto for storing said transmItted start, control and confirmation commands; c. program storage means wherein are stored a start command, control commands and a confirmation command; d. comparator means operably connected to said input storage means and said program storage means and responsive thereto for comparing said transmitted and stored start commands, control commands and confirmation commands; and e. execute means operably connected to the output of said comparator means and responsive thereto for executing the commanded control operation upon favorable comparison of said transmitted and stored start, control and confirmation commands.
 13. A ripple control receiver according to claim 12 wherein said input storage means includes shift register means.
 14. A ripple control receiver according to claim 13 wherein said program storage means includes a diode network wherein diodes of one polarity are connected to the L-positions of said input storage means while diodes of opposite polarity are connected to O-positions of said input storage means. 